Comments on: GCC inline asm annoyance

By: Mans

Mans — Mon, 03 Aug 2009 23:37:18 +0000

A simple test like that is likely to produce the same code for both. Try something slightly more complicated instead:

int func_m(int *p)
{
    int x;
    asm volatile ("lwbrx %0, %y1" : "=r"(x) : "m"(*(p+1)));
    return x;
}

int func_z(int *p)
{
    int x;
    asm volatile ("lwbrx %0, %y1" : "=r"(x) : "Z"(*(p+1)));
    return x;
}

This gives the following assembly:

00000000 : 
   0:   7c 63 24 2c     lwbrx   r3,r3,r4
   4:   4e 80 00 20     blr

00000008 : 
   8:   38 63 00 04     addi    r3,r3,4
   c:   7c 60 1c 2c     lwbrx   r3,0,r3
  10:   4e 80 00 20     blr

I'm not quite sure what's going on here, but func_m is obviously incorrect.

By: Manish

Manish — Thu, 25 Jun 2009 06:41:21 +0000

from the gcc page Z Memory operand that is an indexed or indirect from a register (`m' is preferable for asm statements)

asm volatile("stbrx %1,%y0": "=m"(*addr): "r"(reg): "memory" );
asm volatile("stbrx %1,%y0": "=Z"(*addr): "r"(reg): "memory" );

Both gave the same assembly

   c:   81 3f 00 08     lwz     r9,8(r31)
  10:   7d 80 4d 2c     stwbrx  r12,0,r9

By: Mans

Mans — Thu, 28 May 2009 19:52:15 +0000

That will work, but it is sub-optimal in forcing the offset to be zero. It is possible that the desired address is already available as the sum of two registers, in which case this code would either use up an additional register or require recomputing one of the values afterwards.

By: Mike

Mike — Thu, 28 May 2009 19:41:02 +0000

What's wrong with the traditional version?

static inline uint32_t __lwbrx(const register uint32_t *p)
{
    register uint32_t v;
    asm ("lwbrx %0, 0, %1" : "=r"(v) : "b"(p));
    return v;
}

By: Mans

Mans — Tue, 12 May 2009 23:55:00 +0000

A few observations:
- There is still no mention of the magic ‘y’ modifier.
- GCC 4.3 is so buggy, particularly for PPC, that it would be unwise to use it widely.
- The day GCC is able to optimise anything at all reliably will be a day to celebrate.

By: Andrew Pinski

Andrew Pinski — Tue, 12 May 2009 22:31:48 +0000

The Z constraint has been documented since GCC 4.3.0 (as I added the documentation for it and all the missing constraints for PPC). Also it is better to use __builtin_bswap32 for 4.3.0 and above because GCC is able to optimize that better if the load does not need to happen (if the value is in a register already, it uses three instructions, if the value is in a register).

Here is the documentation for the Z constraint (from http://gcc.gnu.org/onlinedocs/gcc-4.3.0/gcc/Machine-Constraints.html):

Z
Memory operand that is an indexed or indirect from a register (`m’ is preferable for asm statements)

Thanks,
Andrew Pinski

By: Johannes Rajala

Johannes Rajala — Wed, 21 Jan 2009 08:59:44 +0000

Nice find, thanks! I was having the same problem.