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	<title>Comments on: Beware the builtins</title>
	<atom:link href="http://hardwarebug.org/2010/01/14/beware-the-builtins/feed/" rel="self" type="application/rss+xml" />
	<link>http://hardwarebug.org/2010/01/14/beware-the-builtins/</link>
	<description>Everything is broken</description>
	<lastBuildDate>Mon, 30 Aug 2010 09:33:38 +0000</lastBuildDate>
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	<item>
		<title>By: stevenb</title>
		<link>http://hardwarebug.org/2010/01/14/beware-the-builtins/comment-page-1/#comment-540</link>
		<dc:creator>stevenb</dc:creator>
		<pubDate>Sun, 07 Feb 2010 15:47:57 +0000</pubDate>
		<guid isPermaLink="false">http://hardwarebug.org/?p=215#comment-540</guid>
		<description>The 64 bit variant compiles to fairly good code with &quot;GCC 4.5.0 [trunk revision 156572]&quot;. At -O2 the compiler produces the following for ARM7:
&lt;pre&gt;
__bswapdi2:
	mov	r3, r0
	eor	r2, r0, r0, ror #16
	eor	r0, r1, r1, ror #16
	mov	r2, r2, lsr #8
	mov	r0, r0, lsr #8
	bic	r2, r2, #65280
	bic	r0, r0, #65280
	eor	r0, r0, r1, ror #8
	eor	r1, r2, r3, ror #8
	bx	lr
&lt;/pre&gt;
</description>
		<content:encoded><![CDATA[<p>The 64 bit variant compiles to fairly good code with &#8220;GCC 4.5.0 [trunk revision 156572]&#8220;. At -O2 the compiler produces the following for ARM7:</p>
<pre>
__bswapdi2:
	mov	r3, r0
	eor	r2, r0, r0, ror #16
	eor	r0, r1, r1, ror #16
	mov	r2, r2, lsr #8
	mov	r0, r0, lsr #8
	bic	r2, r2, #65280
	bic	r0, r0, #65280
	eor	r0, r0, r1, ror #8
	eor	r1, r2, r3, ror #8
	bx	lr
</pre>
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	<item>
		<title>By: stevenb</title>
		<link>http://hardwarebug.org/2010/01/14/beware-the-builtins/comment-page-1/#comment-536</link>
		<dc:creator>stevenb</dc:creator>
		<pubDate>Fri, 05 Feb 2010 11:22:46 +0000</pubDate>
		<guid isPermaLink="false">http://hardwarebug.org/?p=215#comment-536</guid>
		<description>There was a patch to GCC last week that should make bswap32 should work now (although I have not checked):

        * config/arm/arm.md (bswapsi2): Add support for bswapsi2.
        (arm_rev): New.
        (arm_legacy_rev): Likewise.
        (thumb_legacy_rev): Likewise.</description>
		<content:encoded><![CDATA[<p>There was a patch to GCC last week that should make bswap32 should work now (although I have not checked):</p>
<p>        * config/arm/arm.md (bswapsi2): Add support for bswapsi2.<br />
        (arm_rev): New.<br />
        (arm_legacy_rev): Likewise.<br />
        (thumb_legacy_rev): Likewise.</p>
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	</item>
	<item>
		<title>By: Mans</title>
		<link>http://hardwarebug.org/2010/01/14/beware-the-builtins/comment-page-1/#comment-510</link>
		<dc:creator>Mans</dc:creator>
		<pubDate>Fri, 29 Jan 2010 18:22:30 +0000</pubDate>
		<guid isPermaLink="false">http://hardwarebug.org/?p=215#comment-510</guid>
		<description>Byte-reversing load/store is, in my view, a different class of instruction. I would not say a machine &quot;has byte-reversal&quot; unless it can perform that operation on typical operands, which in the case of PPC means registers.

I am pleased to see, however, that &lt;code&gt;__builtin_bswap32&lt;/code&gt; applied to a memory location does in fact make use of &lt;code&gt;lwbrx&lt;/code&gt;.</description>
		<content:encoded><![CDATA[<p>Byte-reversing load/store is, in my view, a different class of instruction. I would not say a machine &#8220;has byte-reversal&#8221; unless it can perform that operation on typical operands, which in the case of PPC means registers.</p>
<p>I am pleased to see, however, that <code>__builtin_bswap32</code> applied to a memory location does in fact make use of <code>lwbrx</code>.</p>
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	<item>
		<title>By: Fredrik Andersson</title>
		<link>http://hardwarebug.org/2010/01/14/beware-the-builtins/comment-page-1/#comment-509</link>
		<dc:creator>Fredrik Andersson</dc:creator>
		<pubDate>Fri, 29 Jan 2010 17:59:52 +0000</pubDate>
		<guid isPermaLink="false">http://hardwarebug.org/?p=215#comment-509</guid>
		<description>The powerpc actually do have bytereversal, although it can only operate on memory, lwbrx for example (thus useful when you load data)</description>
		<content:encoded><![CDATA[<p>The powerpc actually do have bytereversal, although it can only operate on memory, lwbrx for example (thus useful when you load data)</p>
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	</item>
	<item>
		<title>By: Reimar</title>
		<link>http://hardwarebug.org/2010/01/14/beware-the-builtins/comment-page-1/#comment-503</link>
		<dc:creator>Reimar</dc:creator>
		<pubDate>Sat, 23 Jan 2010 15:57:54 +0000</pubDate>
		<guid isPermaLink="false">http://hardwarebug.org/?p=215#comment-503</guid>
		<description>Every time the same mess:
mov     r5, #0
and     r7, r0, r5
gcc desperately needs to learn not to do multiplies, ands and adds with 0.
But I guess the truth is nobody cares about the operand size &gt; native size case.</description>
		<content:encoded><![CDATA[<p>Every time the same mess:<br />
mov     r5, #0<br />
and     r7, r0, r5<br />
gcc desperately needs to learn not to do multiplies, ands and adds with 0.<br />
But I guess the truth is nobody cares about the operand size &gt; native size case.</p>
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	<item>
		<title>By: Nils</title>
		<link>http://hardwarebug.org/2010/01/14/beware-the-builtins/comment-page-1/#comment-499</link>
		<dc:creator>Nils</dc:creator>
		<pubDate>Thu, 14 Jan 2010 17:56:14 +0000</pubDate>
		<guid isPermaLink="false">http://hardwarebug.org/?p=215#comment-499</guid>
		<description>I like your two instruction __builtin_ctz version. Haven&#039;t thought about using bit-reverse for this.. Nice!</description>
		<content:encoded><![CDATA[<p>I like your two instruction __builtin_ctz version. Haven&#8217;t thought about using bit-reverse for this.. Nice!</p>
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	<item>
		<title>By: Daniel Jacobowitz</title>
		<link>http://hardwarebug.org/2010/01/14/beware-the-builtins/comment-page-1/#comment-485</link>
		<dc:creator>Daniel Jacobowitz</dc:creator>
		<pubDate>Thu, 14 Jan 2010 15:06:35 +0000</pubDate>
		<guid isPermaLink="false">http://hardwarebug.org/?p=215#comment-485</guid>
		<description>FYI, ARM __builtin_ctz is done (&lt;a href=&quot;http://gcc.gnu.org/ml/gcc-patches/2009-07/msg00467.html&quot; rel=&quot;nofollow&quot;&gt;http://gcc.gnu.org/ml/gcc-patches/2009-07/msg00467.html&lt;/a&gt;).

bswap32 was posted at least twice, too (latest &lt;a href=&quot;http://gcc.gnu.org/ml/gcc-patches/2009-06/msg01100.html&quot; rel=&quot;nofollow&quot;&gt;http://gcc.gnu.org/ml/gcc-patches/2009-06/msg01100.html&lt;/a&gt;).  I&#039;ve poked the maintainers about that one.

As for bswap64, well... that&#039;s just gross.</description>
		<content:encoded><![CDATA[<p>FYI, ARM __builtin_ctz is done (<a href="http://gcc.gnu.org/ml/gcc-patches/2009-07/msg00467.html" rel="nofollow">http://gcc.gnu.org/ml/gcc-patches/2009-07/msg00467.html</a>).</p>
<p>bswap32 was posted at least twice, too (latest <a href="http://gcc.gnu.org/ml/gcc-patches/2009-06/msg01100.html" rel="nofollow">http://gcc.gnu.org/ml/gcc-patches/2009-06/msg01100.html</a>).  I&#8217;ve poked the maintainers about that one.</p>
<p>As for bswap64, well&#8230; that&#8217;s just gross.</p>
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